The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 2016
Filed:
Dec. 20, 2012
Intel Corporation, Santa Clara, CA (US);
Suriyakala Ramalingam, Chandler, AZ (US);
Manish Dubey, Chandler, AZ (US);
Hsin-Yu Li, Chandler, AZ (US);
Michelle S. Phen, Chandler, AZ (US);
Hitesh Arora, Chandler, AZ (US);
Nisha Ananthakrishnan, Chandler, AZ (US);
Yiqun Bai, Chandler, AZ (US);
Yonghao Xiu, Chandler, AZ (US);
Rajendra C. Dias, Phoenix, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments of the present disclosure are directed to techniques and configurations for an integrated circuit (IC) package having an underfill layer with filler particles arranged in a generally random distribution pattern. In some embodiments, a generally random distribution pattern of filler particles may be obtained by reducing an electrostatic charge on one or more components of the IC package assembly, by applying a surface treatment to filler to reduce filler electrical charge, by applying an electric force against the filler particles of the underfill material in a direction opposite to a direction of gravitational force, by using an underfill material with a relatively low maximum filler particle size, and/or by snap curing the underfill layer at a relatively low temperature. Other embodiments may be described and/or claimed.