The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 2016

Filed:

Jul. 15, 2013
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Kuan-Yu Chen, Taipei, TW;

Hsien-Hsin Lin, Hisn-Chu, TW;

Chun-Feng Nieh, Hsinchu, TW;

Hsueh-Chang Sung, Zhubei, TW;

Chien-Chang Su, Kaohsiung, TW;

Tsz-Mei Kwok, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/311 (2006.01); H01L 21/3115 (2006.01); H01L 21/8238 (2006.01); H01L 29/78 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66477 (2013.01); H01L 21/31116 (2013.01); H01L 21/31155 (2013.01); H01L 21/823807 (2013.01); H01L 21/823814 (2013.01); H01L 27/092 (2013.01); H01L 29/66636 (2013.01); H01L 29/7848 (2013.01); H01L 29/6656 (2013.01); H01L 29/6659 (2013.01);
Abstract

The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming a gate structure over the substrate, forming a material layer over the substrate and the gate structure, implanting Ge, C, P, F, or B in the material layer, removing portions of the material layer overlying the substrate at either side of the gate structure, forming recesses in the substrate at either side of the gate structure, and depositing a semiconductor material in the recesses by an expitaxy process.


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