The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 2016

Filed:

Aug. 24, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Chien-Chang Su, Kaohsiung, TW;

Hsien-Hsin Lin, Hsin-Chu, TW;

Tsz-Mei Kwok, Hsinchu, TW;

Kuan-Yu Chen, Taipei, TW;

Hsueh-Chang Sung, Zhubei, TW;

Yi-Fang Pai, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/167 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7851 (2013.01); H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 21/02573 (2013.01); H01L 21/02576 (2013.01); H01L 29/0653 (2013.01); H01L 29/167 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/7848 (2013.01);
Abstract

The present disclosure provides a method of fabricating a semiconductor device that includes forming a plurality of fins, the fins being isolated from each other by an isolation structure, forming a gate structure over a portion of each fin; forming spacers on sidewalls of the gate structure, respectively, etching a remaining portion of each fin thereby forming a recess, epitaxially growing silicon to fill the recess including incorporating an impurity element selected from the group consisting of germanium (Ge), indium (In), and carbon (C), and doping the silicon epi with an n-type dopant.


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