The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2016

Filed:

May. 22, 2015
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Shin-Yi Yang, New Taipei, TW;

Ching-Fu Yeh, Hsin-Chu, TW;

Tz-Jun Kuo, Zhudong Township, TW;

Hsiang-Huan Lee, Jhudong Township, TW;

Ming-Han Lee, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 21/768 (2006.01); H01L 21/288 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76873 (2013.01); H01L 21/2885 (2013.01); H01L 21/76802 (2013.01); H01L 21/76843 (2013.01); H01L 21/76861 (2013.01); H01L 21/76871 (2013.01); H01L 21/76877 (2013.01); H01L 21/76879 (2013.01);
Abstract

Presented herein is a method for plating comprising providing a substrate having a dielectric layer formed over a trace, and forming a via/trench opening extending through the dielectric layer, the via/trench opening exposing a surface of the trace. The method further comprises forming a seed layer in the via/trench opening and contacting the trace and forming a protection layer over the seed layer. The protection layer is removed and a conductive layer deposited on the seed layer in a single plating process step by applying a plating solution in the via/trench opening.


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