The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2016
Filed:
Feb. 17, 2014
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Shen-Nan Lee, Jhudong Township, TW;
Teng-Chun Tsai, Hsinchu, TW;
Hsin-Hsien Lu, Hsinchu, TW;
Chang-Sheng Lin, Baoshan Township, TW;
Kuo-Cheng Lien, Hsinchu, TW;
Kuo-Yin Lin, Jhubei, TW;
Wen-Kuei Liu, Xinpu Township, TW;
Yu-Wei Chou, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Abstract
A wafer polishing process includes polishing a central area on the back side of a wafer, polishing a peripheral area on the back side of the wafer, buffing the central area, and buffing the peripheral area. The process can significantly reduce scratch-related wafer breakage, can correct focus spots on wafers, and can replace cleaning processes that use chemical etchants. Polishing and buffing can include polishing and buffing the bevel region. Further improvements include polishing with abrasive pads having a soft backing, polishing or buffing with pads having relatively soft abrasive particles, polishing or buffing with abrasive pads made from abrasive particles that have been sorted and selected for regularity of shape, irrigating the surface being polished or buffed with an aqueous solution that includes a friction-reducing agent, and buffing with abrasive pads having 20 k or finer grit or non-abrasive pads.