The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2016

Filed:

Mar. 12, 2014
Applicant:

Xintec Inc., Jhongli, Taoyuan County, TW;

Inventors:

Yi-Min Lin, New Taipei, TW;

Yi-Ming Chang, Pingzhen, TW;

Shu-Ming Chang, New Taipei, TW;

Yen-Shih Ho, Kaohsiung, TW;

Tsang-Yu Liu, Zhubei, TW;

Chia-Ming Cheng, New Taipei, TW;

Assignee:

XINTEC INC., Taoyuan, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 23/552 (2006.01); H01L 21/48 (2006.01); H01L 21/78 (2006.01); H01L 29/06 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 21/4814 (2013.01); H01L 21/78 (2013.01); H01L 24/02 (2013.01); H01L 24/92 (2013.01); H01L 29/0657 (2013.01); H01L 24/05 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 24/85 (2013.01); H01L 25/0657 (2013.01); H01L 2224/0235 (2013.01); H01L 2224/0239 (2013.01); H01L 2224/02313 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05571 (2013.01); H01L 2224/451 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/92 (2013.01); H01L 2924/10156 (2013.01); H01L 2924/10157 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/1461 (2013.01);
Abstract

An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a first recess extending from the first surface towards the second surface; a second recess extending from a bottom of the first recess towards the second surface, wherein a sidewall and the bottom of the first recess and a second sidewall and a second bottom of the second recess together form an exterior side surface of the semiconductor substrate; a wire layer disposed over the first surface and extending into the first recess and/or the second recess; an insulating layer positioned between the wire layer and the semiconductor substrate; and a metal light shielding layer disposed over the first surface and having at least one hole, wherein a shape of the at least one hole is a quadrangle.


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