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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9240387 B1

PDFFull Text
Date of Patent:
Jan. 19, 2016

Filed:

Oct. 12, 2011

Wafer-level chip scale package with re-workable underfill

Applicants:

Hsien-wei Chen, Sinying, TW;

Tsung-ding Wang, Tainan, TW;

Chien-hsiun Lee, Chu-Tung Town, TW;

Hao-yi Tsai, Hsin-Chu, TW;

Mirng-ji Lii, Sinpu Township, TW;

Chen-hua Yu, Hsin-Chu, TW;

Inventors:

Hsien-Wei Chen, Sinying, TW;

Tsung-Ding Wang, Tainan, TW;

Chien-Hsiun Lee, Chu-Tung Town, TW;

Hao-Yi Tsai, Hsin-Chu, TW;

Mirng-Ji Lii, Sinpu Township, TW;

Chen-Hua Yu, Hsin-Chu, TW;

Assignee:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Attorney:

Slater & Matsil, L.L.P.

Primary Examiner:

Bilkis Jahan

Assistant Examiner:

Kevin Quinto

Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 23/525 (2006.01);
U.S. Cl.
CPC ...
H01L 24/32 (2013.01); H01L 21/563 (2013.01); H01L 24/73 (2013.01); H01L 23/525 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 24/98 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05008 (2013.01); H01L 2224/05569 (2013.01); H01L 2224/05572 (2013.01); H01L 2224/131 (2013.01); H01L 2224/14131 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/29011 (2013.01); H01L 2224/32052 (2013.01); H01L 2224/32057 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73203 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/83104 (2013.01); H01L 2924/00014 (2013.01);
Abstract

A package includes a printed circuit board (PCB), and a die bonded to the PCB through solder balls. A re-workable underfill is dispensed in a region between the PCB and the die.

Find Patent Forward Citations

Chen, Hsien-Wei. (2016). Wafer-level chip scale package with re-workable underfill (U.S. Patent No. 9240387). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9240387

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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