The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 2015
Filed:
Jul. 30, 2014
Efficient Power Conversion Corporation, El Segundo, CA (US);
Jianjun Cao, Torrance, CA (US);
Robert Beach, La Crescenta, CA (US);
Alexander Lidow, Marina Del Rey, CA (US);
Alana Nakata, Redondo Beach, CA (US);
Robert Strittmatter, Tujunga, CA (US);
Guangyuan Zhao, Torrance, CA (US);
Yanping Ma, Torrance, CA (US);
Chunhua Zhou, Torrance, CA (US);
Seshadri Kolluri, San Jose, CA (US);
Fang Chang Liu, Toufen Township, TW;
Ming-Kun Chiang, Hsinchu, TW;
Jiali Cao, Torrance, CA (US);
Agus Jauhar, Hsinchu, TW;
Efficient Power Conversion Corporation, El Segundo, CA (US);
Abstract
An integrated circuit having a substrate, a buffer layer formed over the substrate, a barrier layer formed over the buffer layer, and an isolation region that isolates an enhancement mode device from a depletion mode device. The integrated circuit further includes a first gate contact for the enhancement mode device that is disposed in one gate contact recess and a second gate contact for the depletion mode device that is disposed in a second gate contact recess.