The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2015
Filed:
May. 15, 2013
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Li-Ting Wang, Tainan, TW;
Teng-Chun Tsai, Hsin-Chu, TW;
Chun-Hsiung Lin, Zhubei, TW;
Cheng-Tung Lin, Jhudong Township, TW;
Chi-Yuan Chen, Hsin-Chu, TW;
Kuo-Yin Lin, Jhubei, TW;
Wan-Chun Pan, Hsin-Chu, TW;
Ming-Liang Yen, New Taipei, TW;
Huicheng Chang, Tainan, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method and apparatus for forming a CMOS device are provided. The CMOS device may include an N-type channel region formed of an III-V material and a P-type channel region formed of a germanium material. Over each channel may be formed corresponding gates and source/drain regions. The source/drain regions may be formed of a germanium material and one or more metallization layers. An anneal may be performed to form ohmic contacts for the source/drain regions. Openings may be formed in a dielectric layer covering the device and conductive plugs may be formed to provide contact to the source/drain regions.