The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2015

Filed:

Dec. 28, 2011
Applicants:

Jing-cheng Lin, Hsinchu County, TW;

Jui-pin Hung, Hsinchu, TW;

Nai-wei Liu, Fengshan, TW;

Yi-chao Mao, Zhongli, TW;

Wan-ting Shih, Touwu Township, TW;

Tsan-hua Tung, Hsinchu, TW;

Inventors:

Jing-Cheng Lin, Hsinchu County, TW;

Jui-Pin Hung, Hsinchu, TW;

Nai-Wei Liu, Fengshan, TW;

Yi-Chao Mao, Zhongli, TW;

Wan-Ting Shih, Touwu Township, TW;

Tsan-Hua Tung, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3114 (2013.01); H01L 21/561 (2013.01); H01L 21/568 (2013.01); H01L 23/3128 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 2224/04105 (2013.01);
Abstract

The mechanisms of forming a molding compound on a semiconductor device substrate to enable fan-out structures in wafer-level packaging (WLP) are provided. The mechanisms involve covering portions of surfaces of an insulating layer surrounding a contact pad. The mechanisms improve reliability of the package and process control of the packaging process. The mechanisms also reduce the risk of interfacial delamination, and excessive outgassing of the insulating layer during subsequent processing. The mechanisms further improve planarization end-point. By utilizing a protective layer between the contact pad and the insulating layer, copper out-diffusion can be reduced and the adhesion between the contact pad and the insulating layer may also be improved.

Published as:
CN103187388A; US2013168848A1; DE102012109484A1; US9000584B2; US2015187605A1; CN103187388B; US9312148B2; DE102012109484B4;

Find Patent Forward Citations

Lin, Jing-Cheng. (2015). Packaged semiconductor device with a molding compound and a method of forming the same (U.S. Patent No. 9000584). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9000584

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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