The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 03, 2015
Filed:
Oct. 04, 2010
Chen-hua Yu, Hsinchu, TW;
Hung-pin Chang, Taipei County, TW;
Yung-chi Lin, Su-Lin, TW;
Chia-lin Yu, Sigang Township, TW;
Jui-pin Hung, Hsinchu, TW;
Chien Ling Hwang, Hsinchu, TW;
Chen-Hua Yu, Hsinchu, TW;
Hung-Pin Chang, Taipei County, TW;
Yung-Chi Lin, Su-Lin, TW;
Chia-Lin Yu, Sigang Township, TW;
Jui-Pin Hung, Hsinchu, TW;
Chien Ling Hwang, Hsinchu, TW;
TSMC Solid State Lighting Ltd., Hsinchu, TW;
Abstract
The substrate with through silicon plugs (or vias) described above removes the need for conductive bumps. The process flow is very simple and cost efficient. The structures described combines the separate TSV, redistribution layer, and conductive bump structures into a single structure. By combining the separate structures, a low resistance electrical connection with high heat dissipation capability is created. In addition, the substrate with through silicon plugs (or vias, or trenches) also allows multiple chips to be packaged together. A through silicon trench can surround the one or more chips to provide protection against copper diffusing to neighboring devices during manufacturing. In addition, multiple chips with similar or different functions can be integrated on the TSV substrate. Through silicon plugs with different patterns can be used under a semiconductor chip(s) to improve heat dissipation and to resolve manufacturing concerns.