The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 2014
Filed:
May. 11, 2011
Mill-jer Wang, Hsin-Chu, TW;
Chih-chia Chen, Taipei, TW;
Hung-chih Lin, Hsin-Chu, TW;
Ching-nen Peng, Hsin-Chu, TW;
Hao Chen, Luzhou, TW;
Mill-Jer Wang, Hsin-Chu, TW;
Chih-Chia Chen, Taipei, TW;
Hung-Chih Lin, Hsin-Chu, TW;
Ching-Nen Peng, Hsin-Chu, TW;
Hao Chen, Luzhou, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A three dimensional (3D) integrated circuit (IC) testing apparatus includes a plurality of connection devices. When a device under test (DUT) such as an interposer or a 3D IC formed by a plurality of 3D dies operates in a testing mode, the 3D IC testing apparatus is coupled to the DUT via a variety of interface channels such as probes. The connection devices and a variety of through silicon vias (TSVs) in the DUT form a TSV chain so that an electrical characteristic test of the variety of TSVs can be tested all at once.