The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 22, 2014

Filed:

May. 15, 2012
Applicants:

I-chia Lin, Tainan, TW;

Yu-chou Tseng, Chiayi, TW;

Jin-feng Yang, Kaohsiung, TW;

Chi-sheng Chung, Kaohsiung, TW;

Kuo-hsien Liao, Taichung, TW;

Inventors:

I-Chia Lin, Tainan, TW;

Yu-Chou Tseng, Chiayi, TW;

Jin-Feng Yang, Kaohsiung, TW;

Chi-Sheng Chung, Kaohsiung, TW;

Kuo-Hsien Liao, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01);
Abstract

Semiconductor packages and related methods. The semiconductor package includes a substrate, a semiconductor chip, a package body, a recess and a conductive layer. The substrate includes a grounding element. The semiconductor chip is disposed on the substrate and has a lateral surface and an upper surface. The package body encapsulates the lateral surface of the semiconductor chip. The recess is formed in the package body and exposes the upper surface of the semiconductor chip. The conductive layer covers an outer surface of the package body, the grounding element and the upper surface of the semiconductor chip exposed by the recess to provide both thermal dissipation and EMI shielding for the semiconductor chip.


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