The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 2014
Filed:
Apr. 22, 2013
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Chih-Jen Yu, Hsinchu, TW;
Chun-Hung Lin, Taoyuan, TW;
Juin-Hung Lin, Hsinchu, TW;
Hsueh-Yi Chung, Zhubei, TW;
Li-Kong Turn, Taichung, TW;
Keh-Wen Chang, Zaociao Township, Miaoli County, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
Embodiments of the present disclosure disclose a method of forming a new integrated circuit design on a semiconductor wafer using a photolithography tool. The method includes selecting a previously processed wafer having a past integrated circuit design different than the new integrated circuit design, selecting a plurality of critical dimension (CD) data points extracted from the previously processed wafer after the previously processed wafer was etched, and creating a field layout and associated baseline exposure dose map for the new integrated circuit design. The method also includes refining each field in the baseline exposure dose map based on a difference between an average CD for the previously processed wafer and an average CD for each field in the field layout and controlling the exposure of the photolithography tool according to the refined baseline exposure dose map to form the new integrated circuit design on the semiconductor wafer.