The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2014

Filed:

Apr. 13, 2010
Applicants:

Chin Hock Toh, Singapore, SG;

Keng Yuen AU, Singapore, SG;

Reynaldo Vincent Hernandez Sta Agueda, Singapore, SG;

Bee Liang Catherine NG, Singapore, SG;

Librado Amurao Gatbonton, Singapore, SG;

Xue Ren Zhang, Singapore, SG;

Yi-sheng Anthony Sun, San Jose, CA (US);

Inventors:

Chin Hock Toh, Singapore, SG;

Keng Yuen Au, Singapore, SG;

Reynaldo Vincent Hernandez Sta Agueda, Singapore, SG;

Bee Liang Catherine Ng, Singapore, SG;

Librado Amurao Gatbonton, Singapore, SG;

Xue Ren Zhang, Singapore, SG;

Yi-Sheng Anthony Sun, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of forming a device stack is presented. The method includes providing a temporary substrate having a temporary mounting surface. A first chip is temporarily mounted to the temporary mounting surface. A first bottom surface of the first chip is temporarily mounted to the temporary mounting surface and a first top surface of the first chip comprises first interconnects. A second chip is stacked on the first chip. The second chip includes second conductive contacts on the second bottom surface. The method also includes bonding the first and second chips together to form the device stack. The second conductive contacts are coupled to the first interconnects. The first bottom surface of the first chip is separated from the substrate to separate the chip stack from the substrate.


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