The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2013
Filed:
Mar. 22, 2012
Chin-tang Hsieh, Kaohsiung, TW;
Chih-ming Kuo, Hsinchu County, TW;
Chia-jung Tu, Hsinchu County, TW;
Shih-chieh Chang, Chiayi County, TW;
Lung-hua Ho, Hsinchu, TW;
Chih-hsien NI, Hsinchu, TW;
Chin-Tang Hsieh, Kaohsiung, TW;
Chih-Ming Kuo, Hsinchu County, TW;
Chia-Jung Tu, Hsinchu County, TW;
Shih-Chieh Chang, Chiayi County, TW;
Lung-Hua Ho, Hsinchu, TW;
Chih-Hsien Ni, Hsinchu, TW;
Chipbond Technology Corporation, Hsinchu, TW;
Abstract
A semiconductor package structure comprises a lead frame, at least one chip, a molding compound and an anti-conduction film. The lead frame comprises a plurality of leads, each of the leads comprises a first end portion and a second end portion, wherein the first end portion comprises a first upper surface and a first lower surface, and the second end portion comprises a second upper surface and a second lower surface. The chip comprises a plurality of bumps electrically connected with the lead frame. The chip and the leads are covered with the molding compound. The first lower surface of each of the first end portions and the second lower surface of each of the second end portions are exposed by the molding compound. The first lower surface of the first end portion of each of the leads is covered with the anti-conduction film.