The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 2013
Filed:
Aug. 03, 2010
Chia-lun Tsai, Tainan, TW;
Ching-yu NI, Hsinchu, TW;
Tien-hao Huang, Taoyuan, TW;
Chia-ming Cheng, Taipei, TW;
Wen-cheng Chien, Hsinchu, TW;
Nan-chun Lin, Taipei, TW;
Wei-ming Chen, Hsinchu, TW;
Shu-ming Chang, Taipei, TW;
Bai-yao Lou, Hsinchu, TW;
Chia-Lun Tsai, Tainan, TW;
Ching-Yu Ni, Hsinchu, TW;
Tien-Hao Huang, Taoyuan, TW;
Chia-Ming Cheng, Taipei, TW;
Wen-Cheng Chien, Hsinchu, TW;
Nan-Chun Lin, Taipei, TW;
Wei-Ming Chen, Hsinchu, TW;
Shu-Ming Chang, Taipei, TW;
Bai-Yao Lou, Hsinchu, TW;
Other;
Abstract
The invention provides an electronic device package and a method for fabricating the same. The electronic device package includes a carrier wafer. An electronic device chip with a plurality of conductive pads thereon is disposed over the carrier wafer. An isolation laminating layer includes a lower first isolation layer, which covers the carrier wafer and the electronic device chip, and an upper second isolation layer. The isolation laminating layer has a plurality of openings to expose the conductive pads. A plurality of redistribution patterns is conformably formed on the isolation laminating layer and in the openings. The redistribution patterns are electrically connected to the conductive pads, respectively. A plurality of conductive bumps is respectively formed on the redistribution patterns, electrically connected to the conductive pads.