The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 2013
Filed:
Mar. 14, 2013
Intermolecular, Inc., San Jose, CA (US);
Elpida Memory, Inc, Tokyo, JP;
Sandra G. Malhotra, Fort Collins, CO (US);
Hanhong Chen, Milpitas, CA (US);
Wim Y. Deweerd, San Jose, CA (US);
Mitsuhiro Horikawa, Higashihiroshima, JP;
Kenichi Koyanagi, Higashihiroshima, JP;
Hiroyuki Ode, Higashihiroshima, JP;
Xiangxin Rui, Campbell, CA (US);
Intermolecular, Inc., San Jose, CA (US);
Elpida Memory, Inc., Tokyo, JP;
Abstract
A method for fabricating a DRAM capacitor stack is described wherein the dielectric material is a multi-layer stack formed from a highly-doped material combined with a lightly or non-doped material. The highly-doped material remains amorphous with a crystalline content of less than 30% after an annealing step. The lightly or non-doped material becomes crystalline with a crystalline content of equal to or greater than 30% after an annealing step. The dielectric multi-layer stack maintains a high k-value while minimizing the leakage current and the EOT value.