The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 23, 2013
Filed:
Apr. 14, 2011
Chih-jen Yu, Hsinchu, TW;
Chun-hung Lin, Taoyuan, TW;
Juin-hung Lin, Hsinchu, TW;
Hsueh-yi Chung, Zhubei, TW;
Li-kong Turn, Taichung, TW;
Keh-wen Chang, Zaociao Township, Maioli County, TW;
Chih-Jen Yu, Hsinchu, TW;
Chun-Hung Lin, Taoyuan, TW;
Juin-Hung Lin, Hsinchu, TW;
Hsueh-Yi Chung, Zhubei, TW;
Li-Kong Turn, Taichung, TW;
Keh-Wen Chang, Zaociao Township, Maioli County, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method including providing a present wafer to be processed by a photolithography tool, selecting a processed wafer having a past chip design from a plurality of processed wafers, the processed wafer being previously processed by the photolithography tool, selecting a plurality of critical dimension (CD) data points extracted from a plurality of fields on the processed wafer, modeling the plurality of CD data points with a function relating CD to position on the processed wafer, creating a field layout on the present wafer for a new chip design, creating an initial exposure dose map for the new chip design using the function and the field layout, and controlling the exposure of the photolithography tool according to the initial exposure dose map to form the new chip design on the present wafer.