The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2013

Filed:

May. 05, 2010
Applicants:

Tze-liang Lee, Hsinchu, TW;

Pei-ren Jeng, Chu-Bei, TW;

Chu-yun Fu, Hsinchu, TW;

Chyi Shyuan Chern, Taipei, TW;

Jui-hei Huang, Yongkang, TW;

Chih-tang Peng, Taipei, TW;

Hao-ming Lien, Hsinchu, TW;

Inventors:

Tze-Liang Lee, Hsinchu, TW;

Pei-Ren Jeng, Chu-Bei, TW;

Chu-Yun Fu, Hsinchu, TW;

Chyi Shyuan Chern, Taipei, TW;

Jui-Hei Huang, Yongkang, TW;

Chih-Tang Peng, Taipei, TW;

Hao-Ming Lien, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention relates to integrated circuit fabrication, and more particularly to an electronic device with an isolation structure made having almost no void. An exemplary method for fabricating an isolation structure, comprising: providing a substrate; forming a trench in the substrate; partially filling the trench with a first silicon oxide; exposing a surface of the first silicon oxide to a vapor mixture comprising NH3 and a fluorine-containing compound; heating the substrate to a temperature between 100° C. to 200° C.; and filling the trench with a second silicon oxide, whereby the isolation structure made has almost no void.


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