The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 29, 2011
Filed:
Feb. 15, 2010
Yong Poo Chia, Singapore, SG;
Low Siu Waf, Singapore, SG;
Suan Jeung Boon, Singapore, SG;
Eng Meow Koon, Singapore, SG;
Swee Kwang Chua, Singapore, SG;
Yong Poo Chia, Singapore, SG;
Low Siu Waf, Singapore, SG;
Suan Jeung Boon, Singapore, SG;
Eng Meow Koon, Singapore, SG;
Swee Kwang Chua, Singapore, SG;
Micron Technology, Inc., Boise, ID (US);
Abstract
A method for packaging integrated circuit chips (die) is described that includes providing a base substrate with package level contacts, coating a base substrate with adhesive, placing dies on the adhesive, electrically connecting the die to the package level contacts, and removing the backside of the base substrate to expose the backside of the package level contacts. Accordingly, an essentially true chip scale package is formed. Multi-chip modules are formed by filling gaps between the chips with an encapsulant. In an embodiment, chips are interconnected by electrical connections between package level contacts in the base substrate. In an embodiment, substrates each having chips are adhered back-to-back with through vias formed in aligned saw streets to interconnect the back-to-back chip assembly.