The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2011
Filed:
Sep. 29, 2010
Anand Murthy, Portland, OR (US);
Boyan Boyanov, Portland, OR (US);
Suman Datta, Beaverton, OR (US);
Brian S. Doyle, Portland, OR (US);
Been-yih Jin, Beaverton, OR (US);
Shaofeng Yu, Plano, TX (US);
Robert Chau, Beaverton, OR (US);
Anand Murthy, Portland, OR (US);
Boyan Boyanov, Portland, OR (US);
Suman Datta, Beaverton, OR (US);
Brian S. Doyle, Portland, OR (US);
Been-Yih Jin, Beaverton, OR (US);
Shaofeng Yu, Plano, TX (US);
Robert Chau, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Various embodiments of the invention relate to a PMOS device having a transistor channel of silicon germanium material on a substrate, a gate dielectric having a dielectric constant greater than that of silicon dioxide on the channel, a gate electrode conductor material having a work function in a range between a valence energy band edge and a conductor energy band edge for silicon on the gate dielectric, and a gate electrode semiconductor material on the gate electrode conductor material.