The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 24, 2011
Filed:
Apr. 07, 2008
Matthew Earl Colburn, Hopewell Junction, NY (US);
Ricardo Alves Donaton, Cortlandt Manor, NY (US);
Conal E Murray, Yorktown Heights, NY (US);
Satyanarayana Venkata Nitta, Poughquag, NY (US);
Sampath Purushothaman, Yorktown Heights, NY (US);
Sujatha Sankaran, Wappingers Falls, NY (US);
Thedorus Eduardos Standaert, Pine Bush, NY (US);
Xiao HU Liu, Briarcliff Manor, NY (US);
Matthew Earl Colburn, Hopewell Junction, NY (US);
Ricardo Alves Donaton, Cortlandt Manor, NY (US);
Conal E Murray, Yorktown Heights, NY (US);
Satyanarayana Venkata Nitta, Poughquag, NY (US);
Sampath Purushothaman, Yorktown Heights, NY (US);
Sujatha Sankaran, Wappingers Falls, NY (US);
Thedorus Eduardos Standaert, Pine Bush, NY (US);
Xiao Hu Liu, Briarcliff Manor, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An electronic structure including a substrate having a having a dielectric layer with at least one metallic interconnect structure within and a dielectric barrier layer above the dielectric layer, and a multi-layer hardmask stack coated with a self-assembled layer, where the self-assembled layer is a pattern of nanoscale and/or microscale voids which are generated into the dielectric barrier layer and into the dielectric layer next to the metallic interconnect structure to create columns in the dielectric barrier layer and dielectric layer therein. Electronics structures prepared with the process are useful to prepare electronics devices, such as computers and the like.