The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 25, 2011
Filed:
Mar. 27, 2008
Meng-yi Wu, Kaohsiung County, TW;
Cheng-tung Huang, Kao-Hsiung, TW;
Wen-han Hung, Kao-Hsiung, TW;
Shyh-fann Ting, Tai-Nan, TW;
Kun-hsien Lee, Tai-Nan, TW;
Li-shian Jeng, Tai-Tung Hsien, TW;
Shih-jung Tu, Tainan, TW;
Yu-ming Lin, Tainan County, TW;
Yao-chin Cheng, Hsinchu, TW;
Meng-Yi Wu, Kaohsiung County, TW;
Cheng-Tung Huang, Kao-Hsiung, TW;
Wen-Han Hung, Kao-Hsiung, TW;
Shyh-Fann Ting, Tai-Nan, TW;
Kun-Hsien Lee, Tai-Nan, TW;
Li-Shian Jeng, Tai-Tung Hsien, TW;
Shih-Jung Tu, Tainan, TW;
Yu-Ming Lin, Tainan County, TW;
Yao-Chin Cheng, Hsinchu, TW;
United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;
Abstract
A method of forming CMOS transistor is disclosed. A CMOS transistor having a first active area and a second active area is provided. In order to maintain the concentration of the dopants in the second active area, according to the method of the present invention an ion implantation process is performed to form a lightly doped drain (LDD) in the second active area after an epitaxial layer is formed in the first active area. On the other hand, the ion implantation process is performed to form the respective LDD of the first active area and the second active area. After the epitaxial layer in the first active area is formed, another ion implantation process is performed to implant dopants into the LDD of the second active area again.