The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2009
Filed:
Jul. 20, 2006
Wen-han Hung, Kaohsiung, TW;
Cheng-tung Huang, Kaohsiung, TW;
Kun-hsien Lee, Tainan, TW;
Shyh-fann Ting, Kaohsiung County, TW;
Li-shian Jeng, Taitung, TW;
Tzyy-ming Cheng, Hsinchu, TW;
Chia-wen Liang, Hsinchu, TW;
Neng-kuo Chen, Hsinchu, TW;
Wen-Han Hung, Kaohsiung, TW;
Cheng-Tung Huang, Kaohsiung, TW;
Kun-Hsien Lee, Tainan, TW;
Shyh-Fann Ting, Kaohsiung County, TW;
Li-Shian Jeng, Taitung, TW;
Tzyy-Ming Cheng, Hsinchu, TW;
Chia-Wen Liang, Hsinchu, TW;
Neng-Kuo Chen, Hsinchu, TW;
United Microelectronics Corp., Hsinchu, TW;
Abstract
A method of forming a semiconductor device. The method comprises steps of providing a substrate having a first transistor, a second transistor and non-salicide device formed thereon and the conductive type of the first transistor is different from that of the second transistor. A buffer layer is formed over the substrate and a tensile material layer is formed over the buffer layer. A portion of the tensile material layer over the second transistor is thinned and a spike annealing process is performed. The tensile material layer is removed to expose the buffer layer over the substrate and a patterned salicide blocking layer is formed over the non-salicide device. A salicide process is performed for forming a salicide layer on a portion of the first transistor and the second transistor.