The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2009

Filed:

Mar. 19, 2007
Applicants:

Wen-kun Yang, Hsin-Chu, TW;

Diann-fang Lin, Hukou Township, Hsinchu County, TW;

Tung-chuan Wang, Yangmei Town, TW;

Hsien-wen Hsu, Lujhou, TW;

Chih-ming Chen, Sinpu Township, Hsinchu County, TW;

Inventors:

Wen-Kun Yang, Hsin-Chu, TW;

Diann-Fang Lin, Hukou Township, Hsinchu County, TW;

Tung-Chuan Wang, Yangmei Town, TW;

Hsien-Wen Hsu, Lujhou, TW;

Chih-Ming Chen, Sinpu Township, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a semiconductor device package having multi-chips with side-by-side configuration comprising a substrate with die receiving through holes, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. A first die having first bonding pads and a second die having second bonding pads are respectively disposed within the die receiving through holes. The first adhesion material is formed under the first and second die and the substrate, and the second adhesion material is filled in the gap between the first and second die and sidewall of the die receiving though holes of the substrate. Further, bonding wires are formed to couple between the first bonding pads and the first contact pads, between the second bonding pads and the first contact pads. A dielectric layer is formed on the bonding wires, the first and second die and the substrate. A build up layer is form on the lower surface of substrate and the back side of first and second die.


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