The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2008

Filed:

Apr. 24, 2007
Applicants:

Anand Murthy, Portland, OR (US);

Justin K. Brask, Portland, OR (US);

Andrew N. Westmeyer, Beaverton, OR (US);

Boyan Boyanov, Portland, OR (US);

Nick Lindert, Beaverton, OR (US);

Inventors:

Anand Murthy, Portland, OR (US);

Justin K. Brask, Portland, OR (US);

Andrew N. Westmeyer, Beaverton, OR (US);

Boyan Boyanov, Portland, OR (US);

Nick Lindert, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

The mobility of carriers may be increased in strained channel epitaxial source/drain transistors. Doped silicon material may be blanket deposited after removing ion implanted source/drain regions. The blanket deposition forms amorphous films over non-source/drain areas and crystalline films in source/drain regions. By using an etch which is selective to amorphous silicon, the amorphous material may be removed. This may avoid some problems associated with selective deposition of the doped silicon material.


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