The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2008

Filed:

Apr. 13, 2007
Applicants:

Wen-chuan Wang, Taipei, TW;

Shih-ming Chang, Hsinchu, TW;

Chih-cheng Chin, Junghe, TW;

Chi-lun LU, Hsinchu, TW;

Sheng-chi Chin, Hsinchu, TW;

Hung-chang Hsieh, Hsinchu, TW;

Inventors:

Wen-Chuan Wang, Taipei, TW;

Shih-Ming Chang, Hsinchu, TW;

Chih-Cheng Chin, Junghe, TW;

Chi-Lun Lu, Hsinchu, TW;

Sheng-Chi Chin, Hsinchu, TW;

Hung-Chang Hsieh, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system is disclosed for examining mask pattern fidelity. A mask picture is generated from a first mask with a first OPC model applied to a mask design. The mask picture is converted into a mask based simulation file. A first simulation is conducted under a first set of predetermined lithography processing conditions using the converted simulation file to generate one or more files of a first set representing wafer photo resist profile thereof. The first OPC model is applied to the mask design in the database mask file. A second simulation is conducted under the first set of predetermined lithography processing conditions using the OPCed mask design to generate one or more files of a second set representing wafer photo resist profile thereof. The first and second sets of files are evaluated for inspecting mask fidelity.


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