The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 2008
Filed:
Jan. 12, 2005
Neil Mclellan, Danville, CA (US);
Serafin Pedron, Manteca, CA (US);
Leo M. Higgins, Iii, Austin, TX (US);
Kwok Cheung Tsang, Fauling, HK;
Kin Pui Kwan, Kowloon, HK;
Neil McLellan, Danville, CA (US);
Serafin Pedron, Manteca, CA (US);
Leo M. Higgins, III, Austin, TX (US);
Kwok Cheung Tsang, Fauling, HK;
Kin Pui Kwan, Kowloon, HK;
Asat Ltd., Tsuen Wan, New Territories, HK;
Abstract
A process for fabricating an integrated circuit package. Metal is plated up on a substrate to provide a plurality of contact pads and a plurality of fiducial markings on a periphery of the contacts. A transparent mask is selectively deposited on the substrate, over the fiducial markings. A semiconductor die is mounted on the substrate such that the contact pads circumscribe the semiconductor die and the semiconductor die is wire bonded to ones of the contact pads. The wire bonds are encapsulated and the semiconductor die and contact pads are covered in a molding material. The substrate is selectively etched to thereby etch away the substrate underneath the contact pads and the semiconductor die. The integrated circuit package is singulated from other integrated circuit packages by sawing using the fiducial markings.