The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 22, 2008
Filed:
Aug. 04, 2006
Shigeto Maegawa, Tokyo, JP;
Takashi Ipposhi, Tokyo, JP;
Toshiaki Iwamatsu, Tokyo, JP;
Shigenobu Maeda, Tokyo, JP;
Il-jung Kim, Tokyo, JP;
Kazuhito Tsutsumi, Tokyo, JP;
Hirotada Kuriyama, Tokyo, JP;
Yoshiyuki Ishigaki, Toyko, JP;
Motomu Ukita, Tokyo, JP;
Toshiaki Tsutsumi, Tokyo, JP;
Shigeto Maegawa, Tokyo, JP;
Takashi Ipposhi, Tokyo, JP;
Toshiaki Iwamatsu, Tokyo, JP;
Shigenobu Maeda, Tokyo, JP;
Il-Jung Kim, Tokyo, JP;
Kazuhito Tsutsumi, Tokyo, JP;
Hirotada Kuriyama, Tokyo, JP;
Yoshiyuki Ishigaki, Toyko, JP;
Motomu Ukita, Tokyo, JP;
Toshiaki Tsutsumi, Tokyo, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
Provided are a thin-film transistor formed by connecting polysilicon layers having different conductivity types with each other which prevents occurrence of inconvenience resulting from diffusion of impurities and a method of fabricating the same. A drain (), a channel () and a source () are integrally formed on a surface of a second oxide film () by polysilicon. The drain () is formed to be connected with a pad layer () (second polycrystalline semiconductor layer) through a contact hole () which is formed to reach an upper surface of the pad layer (). The pad layer () positioned on a bottom portion of the contact hole () (opening) is provided with a boron implantation region BR.