The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 04, 2007
Filed:
Jul. 05, 2005
Szu Wei LU, HsinChu, TW;
Hsin-hui Lee, Kaohsiung, TW;
Ming-chung Sung, Taichung, TW;
Mirng-ji Lii, Kaohsiung, TW;
Szu Wei Lu, HsinChu, TW;
Hsin-Hui Lee, Kaohsiung, TW;
Ming-Chung Sung, Taichung, TW;
Mirng-Ji Lii, Kaohsiung, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method of cutting an integrated circuit chip from a wafer having a plurality of integrated circuit chips is provided. An upper portion of the wafer is ablated using two laser beams to form two substantially parallel trenches that extend into the wafer from a top surface of the wafer through intermetal dielectric layers and at least partially into a substrate of the wafer. After the ablating to form the two trenches, cutting through the wafer between outer sidewalls of the two laser-ablated trenches with a saw blade is performed. A width between the outer sidewalls of the two laser-ablated trenches is greater than a cutting width of the saw blade. This may be particularly useful in lead-free packaging applications and/or applications where the intermetal dielectric layers use low-k dielectric materials, for example.