The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2007

Filed:

Jun. 09, 2004
Applicants:

Min-lung Huang, Kaohsiung, TW;

Chi-long Tsai, Taitung, TW;

Chao-fu Weng, Tainan, TW;

Ching-huei Su, Kaohsiung, TW;

Inventors:

Min-Lung Huang, Kaohsiung, TW;

Chi-Long Tsai, Taitung, TW;

Chao-Fu Weng, Tainan, TW;

Ching-Huei Su, Kaohsiung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/28 (2006.01); H01L 23/31 (2006.01); H01L 23/485 (2006.01);
U.S. Cl.
CPC ...
Abstract

A chip structure comprising a chip, a redistribution layer, a second passivation layer and at least a bump is provided. The chip has a first passivation layer and at least a bonding pad. The first passivation layer exposes the bonding pad and has at least a recess. The redistribution layer is formed over the first passivation layer and electrically connected to the bonding pad. Furthermore, the redistribution layer also extends from the bonding pad to the recess. The second passivation layer is formed over the first passivation layer and the redistribution layer. The second passivation layer also has an opening that exposes the redistribution layer above the recess. The bump passes through the opening and connects electrically with the redistribution layer above the recess.


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