The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2005

Filed:

Dec. 09, 2003
Applicants:

Arvind Halliyal, Cupertino, CA (US);

Fred T K Cheung, San Jose, CA (US);

Rinji Sugino, San Jose, CA (US);

Hidehiko Shiraiwa, San Jose, CA (US);

Tazrien Kamal, San Jose, CA (US);

Jean Y. Yang, Sunnyvale, CA (US);

Inventors:

Arvind Halliyal, Cupertino, CA (US);

Fred T K Cheung, San Jose, CA (US);

Rinji Sugino, San Jose, CA (US);

Hidehiko Shiraiwa, San Jose, CA (US);

Tazrien Kamal, San Jose, CA (US);

Jean Y. Yang, Sunnyvale, CA (US);

Assignee:

FASL, LLC, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/31 ;
U.S. Cl.
CPC ...
Abstract

Process for fabricating a semiconductor device including steps of providing a semiconductor substrate having formed thereon a semiconductor device; depositing over the semiconductor device a spacer layer, the spacer layer having a first hydrogen content; and applying a treatment to reduce the first hydrogen content to a second hydrogen content. The invention is particularly useful when applied to flash memory devices such as a charge trapping dielectric flash memory device.


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