The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 02, 2002
Filed:
Mar. 03, 2000
Ajit P. Paranjpe, Sunnyvale, CA (US);
Mehrdad M. Moslehi, Los Altos, CA (US);
Boris Relja, Pleasanton, CA (US);
Randhir S. Bubber, San Ramon, CA (US);
Lino A. Velo, San Ramon, CA (US);
Thomas R. Omstead, Fremont, CA (US);
David R. Campbell, Sr., Rochester, NY (US);
David M. Leet, Pittsford, NY (US);
Sanjay Gopinath, Fremont, CA (US);
CVC Products, Inc., Rochester, NY (US);
Abstract
A microelectronic semiconductor interconnect structure barrier and method of deposition provide improved conductive barrier material properties for high-performance device interconnects. The barrier includes a refractory metal such as cobalt, cobalt-based alloys, ruthenium or ruthenium-based alloys for promoting adhesion of copper. The barrier materials can be deposited by chemical-vapor deposition to achieve good step coverage and a relatively conformal thin film with a good nucleation surface for subsequent metallization such as copper metallization. In one embodiment, the barrier suppresses diffusion of copper into other layers of the device, including the inter-metal dielectric, pre-metal dielectric, and transistor structures.