The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 22, 2002

Filed:

Mar. 28, 2000
Applicant:
Inventors:

Daniel George Berger, Wappingers Falls, NY (US);

Guy Paul Brouillette, Daudelin, CA;

David Hirsch Danovitch, Des Aigles, CA;

Peter Alfred Gruber, Mohegan Lake, NY (US);

Bruce Lee Humphrey, Jericho, VT (US);

Michael Liehr, Yorktown Heights, NY (US);

William Thomas Motsiff, Essex Junction, VT (US);

Carlos Juan Sambucetti, Croton-on-Hudson, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
A01L 2/144 ;
U.S. Cl.
CPC ...
A01L 2/144 ;
Abstract

A method of forming interconnects on an electronic device that can be bonded to another electronic device at a low processing temperature can be carried out by depositing a first interconnect material on the electronic device forming protrusions and then depositing a second interconnect material to at least partially cover the protrusions, wherein the second interconnect material has a lower flow temperature than the first interconnect material. The method is carried out by flowing a molten solder into a mold having microcavities to fill the cavities and then allowed to solidify. The mold is then aligned with a silicon wafer containing chips deposited with high melting temperatures solder bumps such that each microcavity of the mold is aligned with each high melting temperature solder bump on the chip. The aligned mold/wafer assembly is then passed through a reflow furnace to effect the transfer of the low melting temperature solder in the mold cavities onto the tip of the high melting temperature solder bumps on the wafer. A dual metallurgical composition bump is thereby formed by the two different solder alloys.


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