The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 08, 2001
Filed:
Dec. 17, 1998
Applicant:
Inventors:
Franz Hofmann, München, DE;
Wolfgang Krautschneider, Hohenthann, DE;
Wolfgang Rösner, München, DE;
Lothar Risch, Neubiberg, DE;
Till Schlösser, München, DE;
Paul-Werner Basse, Wolfratshusen, DE;
Assignee:
Infineon Technologies AG, Munich, DE;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/7108 ;
U.S. Cl.
CPC ...
H01L 2/7108 ;
Abstract
A memory cell configuration contains a multiplicity of memory cells in a semiconductor substrate. Each of the memory cells has a selection transistor connected between a bit line and a storage element. The memory cells can each be driven via a first word line and a second word line, the first word line and the second word line crossing one another. The memory cell configuration is, in particular, a DRAM configuration.