Logic circuits using vertical transistors with backside source or drain regions

Abstract

IC devices with logic circuits using vertical transistors with backside source or drain (S/D) regions, and related assemblies and methods, are disclosed herein. An example vertical transistor includes an elongated structure (e.g., a nanoribbon) of one or more semiconductor materials extending between a first side (e.g., a back side) and an opposing second side (e.g., a front side) of a substrate. The first S/D region of the transistor may be provided at the first side of the substrate, while the second S/D region of the transistor may be provided at the second side, with the channel region of the transistor being the portion of the elongated structure between the first and second S/D regions. Implementing various logic circuits using vertical transistors with backside S/D regions may provide a promising way to increasing densities of transistors on the limited real estate of semiconductor chips and/or decreasing short-channel effects associated with continuous scaling of IC components.