The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 13, 2026
Filed:
May. 31, 2023
Mediatek Inc., Hsin-Chu, TW;
Ta-Jen Yu, Hsinchu City, TW;
Wen-Chin Tsai, Hsinchu City, TW;
Isabella Song, Hsinchu City, TW;
Che-Hung Kuo, Hsinchu City, TW;
Hsing-Chih Liu, Hsinchu City, TW;
Tai-Yu Chen, Hsinchu City, TW;
Shih-Chin Lin, Hsinchu City, TW;
Wen-Sung Hsu, Hsinchu City, TW;
MEDIATEK INC., Hsinchu City, TW;
Abstract
A semiconductor package includes a bottom substrate and a top substrate space apart from the bottom substrate such that the bottom substrate and the top substrate define a gap therebetween. A logic die and a memory die are mounted on a top surface of the bottom substrate in a side-by-side fashion. The logic die may have a thickness not less than 125 micrometers. A connection structure is disposed between the bottom substrate and the top substrate around the logic die and the memory die to electrically connect the bottom substrate with the top substrate. A sealing resin fills in the gap between the bottom substrate and the top substrate and sealing the logic die, the memory die, and the connection structure in the gap.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile