The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2026

Filed:

Oct. 10, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Tzu Pei Chen, Taipei City, TW;

Min-Hsuan Lu, Hsinchu City, TW;

Hao-Heng Liu, Hsinchu City, TW;

Yuting Cheng, Toayuan City, TW;

Hsu-Kai Chang, Hsinchu, TW;

PO-Chin Chang, Taichung City, TW;

Olivia Pei-Hua Lee, Hsinchu County, TW;

Sheng-Tsung Wang, Hsinchu, TW;

Huan-Chieh Su, Changhua County, TW;

Sung-Li Wang, Hsinchu County, TW;

Pinyen Lin, Rochester, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 20/41 (2026.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01); H10W 20/00 (2026.01);
U.S. Cl.
CPC ...
H10W 20/435 (2026.01); H10D 84/0147 (2025.01); H10D 84/0149 (2025.01); H10D 84/038 (2025.01); H10D 84/83 (2025.01); H10W 20/063 (2026.01); H10W 20/069 (2026.01); H10W 20/076 (2026.01);
Abstract

A semiconductor structure and method of manufacturing a semiconductor structure are provided. The semiconductor structure includes a substrate and at least one contact plug. The substrate has an epi-layer. The contact plug is formed on the epi-layer and includes a silicide cap disposed on the epi-layer; a conductive pillar disposed on the silicide cap such that the conductive pillar electrically connects to the epi-layer via the silicide cap; and a hybrid liner. The hybrid liner surrounds the conductive pillar and includes a lower portion abutting the silicide cap and having a nitride material and an upper portion abutting the conductive pillar and having an oxidized nitride material. Due to the hybrid liner, a semiconductor structure with increased capacitance and decreased resistivity can be obtained.


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