The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2026

Filed:

Sep. 28, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Abhishek Anil Sharma, Portland, OR (US);

Sagar Suthram, Portland, OR (US);

Tahir Ghani, Portland, OR (US);

Anand Murthy, Portland, OR (US);

Wilfred Gomes, Portland, OR (US);

Pushkar Ranade, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/68 (2025.01); G11C 11/22 (2006.01); H10B 51/30 (2023.01); H10B 53/30 (2023.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H10D 64/689 (2025.01); H10B 51/30 (2023.02); H10B 53/30 (2023.02); H10D 64/033 (2025.01); G11C 11/221 (2013.01);
Abstract

An integrated circuit (IC) die includes a plurality of ferroelectric tunnel junction (FTJ) devices, where at least one FTJ of the plurality of FTJ devices comprises first electrode, a second electrode, ferroelectric material disposed between the first and second electrodes, and interface material disposed between at least one of the first and second electrodes and the ferroelectric material. Other embodiments are disclosed and claimed.


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