The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2026
Filed:
Jun. 14, 2021
Intel Corporation, Santa Clara, CA (US);
Leonard P. Guler, Hillsboro, OR (US);
Tahir Ghani, Portland, OR (US);
Charles H. Wallace, Portland, OR (US);
Conor P. Puls, Portland, OR (US);
Walid M. Hafez, Portland, OR (US);
Sairam Subramanian, Portland, OR (US);
Justin S. Sandford, Tigard, OR (US);
Saurabh Morarka, Hillsboro, OR (US);
Sean Pursel, Hillsboro, OR (US);
Mohammad Hasan, Aloha, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Conductive via bars self-aligned to gate ends are described. In an example, an integrated circuit structure includes a plurality of gate structures. The integrated circuit structure also includes a plurality of dielectric spacers, a corresponding one of the plurality of dielectric spacers laterally surrounding a corresponding one of the plurality of gate structures. A plurality of conductive trench contact structures is alternating with the plurality of gate structures. A conductive via bar is along ends of the plurality of gate structures and ends of the plurality of conductive trench contact structures, wherein the plurality of dielectric spacers is between the ends of the plurality of gate structures and the conductive via bar.