The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2026

Filed:

Nov. 22, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Ming-Wen Hsiao, Kaohsiung City, TW;

Chun-Yen Tai, Hsinchu, TW;

Yen-Hsin Liu, New Taipei City, TW;

Ming-Jhih Kuo, Zhubei City, TW;

Ming-Feng Shieh, Yongkang City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/01 (2025.01); H10D 30/62 (2025.01); H10D 64/23 (2025.01); H10W 20/00 (2026.01);
U.S. Cl.
CPC ...
H10D 64/01 (2025.01); H10D 30/6219 (2025.01); H10D 64/258 (2025.01); H10W 20/0698 (2026.01);
Abstract

In a method of manufacturing a semiconductor device, underlying structures comprising gate electrodes and source/drain epitaxial layers are formed, one or more layers are formed over the underlying structures, a hard mask layer is formed over the one or more layers, one or more first resist layers are formed over the hard mask layer, a first photo resist pattern is formed over the one or more first resist layers, a width of the first photo resist pattern is adjusted, the one or more first resist layers are patterned by using the first photo resist pattern as an etching mask, thereby forming a first hard mask pattern, and the hard mask layer is patterned by using the first hard mask pattern, thereby forming a second hard mask pattern.


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