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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12666542 B1

PDFFull Text
Date of Patent:
Jun. 23, 2026

Filed:

Jul. 15, 2024

Power component submount and manufacturing method thereof

Applicant:

Tong Hsing Electronic Industries, Ltd., Taoyuan City, TW;

Inventors:

Jia-Zheng Xu, Taoyuan City, TW;

Jhih-Wei Lai, Taoyuan City, TW;

Chun-Chieh Liao, Taoyuan City, TW;

Jian-Yu Shih, Taoyuan City, TW;

Ming-Yen Pan, Taoyuan City, TW;

Assignee:

TONG HSING ELECTRONIC INDUSTRIES, LTD., Taoyuan City, TW;

Attorney:

Li & Cai Intellectual Property Office

Primary Examiner:

Seth Dumbris

Int. Cl.
CPC ...
H05K 3/18 (2006.01); C23C 14/18 (2006.01); C23C 14/58 (2006.01); C23C 18/16 (2006.01); C23C 18/32 (2006.01); C23C 18/42 (2006.01); C23C 28/02 (2006.01); C25D 5/02 (2006.01); C25D 5/54 (2006.01); H05K 1/03 (2006.01);
U.S. Cl.
CPC ...
H05K 3/188 (2013.01); C23C 14/185 (2013.01); C23C 14/5873 (2013.01); C23C 18/1639 (2013.01); C23C 18/1651 (2013.01); C23C 18/1653 (2013.01); C23C 18/32 (2013.01); C23C 18/42 (2013.01); C23C 28/023 (2013.01); C25D 5/022 (2013.01); C25D 5/54 (2013.01); H05K 1/0306 (2013.01); H05K 3/181 (2013.01);
Abstract

A power component submount includes a ceramic substrate, a sputtering layer formed on the ceramic substrate, a conductive block formed on the sputtering layer, and three electroless plating layers that are sequentially stacked on the conductive block. The sputtering layer includes an electroplating portion. The conductive block is formed on the electroplating portion, and bottoms of the three electroless plating layers are connected to the ceramic substrate. Materials of the three electroless plating layers are gold, palladium, and gold, respectively; or, materials of the three electroless plating layers are nickel, palladium, and gold, respectively. One of the three electroless plating layers arranged away from the conductive block is provided for allowing a power component to be mounted thereon.

Find Patent Forward Citations

Xu, Jia-Zheng. (2026). Power component submount and manufacturing method thereof (U.S. Patent No. 12666542). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12666542

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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