The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 2026
Filed:
Jan. 11, 2024
Deca Technologies Usa, Inc., Tempe, AZ (US);
Robin Davis, Vancouver, WA (US);
Timothy L. Olson, Phoenix, AZ (US);
Clifford Sandstrom, Richfield, MN (US);
Craig Bishop, Scottsdale, AZ (US);
Paul R. Hoffman, San Diego, CA (US);
Deca Technologies USA, Inc., Tempe, AZ (US);
Abstract
A method of making a semiconductor assembly may include providing a semiconductor component disposed within a first encapsulant, the encapsulant being disposed around and contacting at least four side surfaces of the semiconductor component and disposed over frontside of the semiconductor component. A first layered structure may be formed as a build-up interconnect structure over the encapsulant and over the semiconductor component. The first layered structure may comprise a first conductive layer formed over the first encapsulant, a first dielectric formed over the first conductive layer, and a second encapsulant disposed over first conductive layer and over first dielectric. An upper surface of the second encapsulant may be planarized to create a flat surface on which to form additional structures, such as a second layered structure or a package interconnect.