The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 2026
Filed:
Aug. 02, 2022
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Shao-Hua Hsu, Taitung City, TW;
Chih-Wei Wu, Hsinchu, TW;
Mao-Lin Weng, Taoyuan City, TW;
Wei-Yeh Tang, Taoyuan County, TW;
Yen-Cheng Lai, Tainan City, TW;
Chun-Chan Hsiao, Hsinchu City, TW;
PO-Hsiang Chuang, Taipei City, TW;
Chih-Long Chiang, Hsinchu County, TW;
Yih-Ann Lin, Hsinchu, TW;
Ryan Chia-Jen Chen, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Abstract
A semiconductor structure includes a semiconductor substrate, a gate electrode, a first spacer, and a first contact etch stop layer (CESL). The semiconductor substrate includes a fin structure. The gate electrode is over the fin structure. The first spacer is over the fin structure and on a lateral side of the gate electrode, wherein a top surface of the first spacer is inclined towards the gate electrode. The first CESL is over the fin structure and contacting the first spacer, wherein an angle between the top surface of the first spacer and a sidewall of the first CESL is less than about 140°.