Tainan, Taiwan

Yen-cheng Lai

This inventor holds 1 USPTO granted patent and 3 published patent applications. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yen-cheng Lai. Retrieved from https://idiyas.com/inventor/yen-cheng-lai-y52ikfd0

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Yen-cheng Lai: Innovator in Semiconductor Technology

Introduction

Yen-cheng Lai is an inventor based in Tainan, Taiwan, known for his contributions to semiconductor technology. His work focuses on developing advanced methods for forming semiconductor structures, which are crucial for modern electronic devices. Although he currently holds no granted patents, his innovative ideas are reflected in his latest patent applications.

Latest Patent Applications

Yen-cheng Lai's latest patent applications include a method for forming a semiconductor structure. This method involves creating a fin structure over a substrate in a Z-direction and a dummy gate structure extending in a Y-direction over the fin structure. The process also includes forming gate spacers on the sidewalls of the dummy gate structure. The fin structure consists of first and second semiconductor layers that are alternately stacked. The method further details the removal of a portion of the dummy gate structure to create a trench that exposes upper portions of the gate spacers. Additionally, it describes the formation of insulating material in the trench and the partial removal of this material to create insulating layers on the sidewalls of the upper portions of the gate spacers. The semiconductor structure described in the application includes a semiconductor substrate, a gate electrode, a first spacer, and a first contact etch stop layer (CESL). The gate electrode is positioned over the fin structure, and the first spacer is located on a lateral side of the gate electrode, with an inclined top surface towards the gate electrode.

Conclusion

Yen-cheng Lai is an emerging inventor in the field of semiconductor technology, with innovative approaches that could shape the future of electronic devices. His latest patent applications demonstrate his commitment to advancing semiconductor structures and methods.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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