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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12660156 B1

PDFFull Text
Date of Patent:
Jun. 16, 2026

Filed:

Dec. 22, 2017

Interconnect structures for integrated circuits

Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Travis Lajoie, Forest Grove, OR (US);

Tahir Ghani, Portland, OR (US);

Jack T. Kavalieros, Portland, OR (US);

Shem O. Ogadhoh, Beaverton, OR (US);

Yih Wang, Portland, OR (US);

Bernhard Sell, Portland, OR (US);

Allen Gardiner, Portland, OR (US);

Blake Lin, Portland, OR (US);

Juan G. Alzate Vinasco, Tigard, OR (US);

Pei-Hua Wang, Beaverton, OR (US);

Chieh-Jen Ku, Hillsboro, OR (US);

Abhishek A. Sharma, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:

Schwabe, Williamson & Wyatt P.C.

Primary Examiner:

Ori Nadav

Int. Cl.
CPC ...
H01B 12/00 (2006.01); H10B 12/00 (2023.01); H10D 86/01 (2025.01); H10D 86/40 (2025.01); H10D 86/60 (2025.01);
U.S. Cl.
CPC ...
H10B 12/31 (2023.02); H10B 12/48 (2023.02); H10D 86/021 (2025.01); H10D 86/441 (2025.01); H10D 86/481 (2025.01); H10D 86/60 (2025.01);
Abstract

Embodiments herein describe techniques for a semiconductor device having an interconnect structure above a substrate. The interconnect structure may include an inter-level dielectric (ILD) layer and a separation layer above the ILD layer. A first conductor and a second conductor may be within the ILD layer. The first conductor may have a first physical configuration, and the second conductor may have a second physical configuration different from the first physical configuration. Other embodiments may be described and/or claimed.

Find Patent Forward Citations

Lajoie, Travis. (2026). Interconnect structures for integrated circuits (U.S. Patent No. 12660156). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12660156

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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