The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2026
Filed:
May. 30, 2023
Mediatek Inc., Hsin-Chu, TW;
Ta-Jen Yu, Hsinchu City, TW;
Wen-Chin Tsai, Hsinchu City, TW;
Isabella Song, Hsinchu City, TW;
Tai-Yu Chen, Hsinchu City, TW;
Che-Hung Kuo, Hsinchu City, TW;
Hsing-Chih Liu, Hsinchu City, TW;
Shih-Chin Lin, Hsinchu City, TW;
Wen-Sung Hsu, Hsinchu City, TW;
MEDIATEK INC., Hsinchu City, TW;
Abstract
A package-on-package includes a first package and a second package on the first package. The first package includes a bottom substrate and a top substrate space apart from the bottom substrate such that the bottom substrate and the top substrate define a gap therebetween. A logic die and an IC device are mounted on the bottom substrate in a side-by-side configuration. The logic die has a thickness not less than 125 micrometer. Copper cored solder balls are disposed between around the logic die and the IC device to electrically connect the bottom substrate with the top substrate. A sealing resin is filled into the gap between the bottom substrate and the top substrate and seals the logic die, the IC device, and the copper cored solder balls in the gap.