The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2026
Filed:
Jun. 02, 2022
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Yu-Jiun Peng, Hsinchu, TW;
Hsuan-Chih Wu, Hsinchu, TW;
Cheng-Chung Chang, Kaohsiung, TW;
Shu-Han Chen, Hsinchu, TW;
Hsiu-Hao Tsao, Hsinchu, TW;
Min-Chia Lee, Hsinchu, TW;
Kai-Min Chien, Hsinchu, TW;
Ming-Chang Wen, Kaohsiung, TW;
Kuo-Feng Yu, Hsinchu County, TW;
Chang-Jhih Syu, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
Semiconductor structures and methods for manufacturing the same are provided. The method for manufacturing the semiconductor structure includes forming a fin structure protruding from a substrate, and the fin structure includes first semiconductor material layers and second semiconductor material layers alternately stacked. The method also includes forming a dummy gate structure across the fin structure and forming a gate spacer on a sidewall of the dummy gate structure. The method also includes partially oxidizing the gate spacer to form an oxide layer and removing the oxide layer to form a modified gate spacer. The method also includes removing the first semiconductor material layers to form gaps and forming a gate structure in the gaps to wrap around the second semiconductor material layers and over the second semiconductor material layers to cover the modified gate spacer.