The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2026
Filed:
Mar. 08, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Te-Chih Hsiung, Taipei City, TW;
Yun-Hua Chen, Hsinchu County, TW;
Bing-Sian Wu, Hsinchu City, TW;
Yi-Hsuan Chiu, Hsinchu City, TW;
Yu-Wei Chang, Hsinchu City, TW;
Wen-Kuo Hsieh, Taipei City, TW;
Chih-Yuan Ting, Taipei City, TW;
Huan-Just Lin, Hsinchu City, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method includes forming a dummy gate over a semiconductor fin; forming a source/drain epitaxial structure over the semiconductor fin and adjacent to the dummy gate; depositing an interlayer dielectric (ILD) layer to cover the source/drain epitaxial structure; replacing the dummy gate with a gate structure; forming a dielectric structure to cut the gate structure, wherein a portion of the dielectric structure is embedded in the ILD layer; recessing the portion of the dielectric structure embedded in the ILD layer; after recessing the portion of the dielectric structure, removing a portion of the ILD layer over the source/drain epitaxial structure; and forming a source/drain contact in the ILD layer and in contact with the portion of the dielectric structure.